Binary correlator

摘要

The invention concerns a binary correlator (1), to determine the agreement or correlation in time of two binary signals (S1, S2), which are written into two shift registers (3, 4). The contents of the shift registers are compared with each other in a comparison circuit (7-i), and a counter circuit (8-i, 9-i) and an evaluation circuit (10-i, 11-i, 12) are connected in series after this comparison circuit. According to the invention, it is proposed that all outputs of the memory positions of the second shift register (4) and the output of the first shift register (3) are connected to coincidence gates (7-i), to each of which a resettable binary counter (8-i) and then a buffer register (10-i) are connected in series. The buffer registers are read via multiplexers under the control of a microcomputer (12). After each transfer of the contents of the binary counter (8-i) into the buffer registers (10-i), the binary counters are reset and set to a new counter state, with the advantage that the content of the buffer registers (10-i), except the last bit, is written into the counters. The period at which the counter states are reset can be chosen by the microcomputer (12). A decay time of the memory is thus implemented in the binary correlator. <IMAGE>