| 摘要 |
<p>A current mode logic gate (10) is comprised of a first pair of transistors (12,14), the emitters of which are coupled together to a current source (22) while the bases are respectively coupled to first and second inputs of the gate. At least one other pair of transistors (28,30) are provided the bases of which are coupled to third and fourth inputs of the gate while the collectors are respectively coupled to first and second outputs of the gate. The other pair of transistors have first and second emitters with the first emitter being coupled to the collector of one of the transistors of the first pair while the second emitter of one of the transistors is coupled to the collector of the other one of the first pair of transistors. The second emitter of the other transistor is either left open-circuited or is shorted to its base.</p> |
