DESIGNS AND PROCEDURES FOR TESTING INTEGRATED CIRCUITS CONTAINING SENSOR ARRAYS,申请号GB19890021561-传众专利搜索

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发明名称	DESIGNS AND PROCEDURES FOR TESTING INTEGRATED CIRCUITS CONTAINING SENSOR ARRAYS
摘要
申请公布号	GB8921561(D0)	申请公布日期	1989.11.08
申请号	GB19890021561	申请日期	1989.09.23
申请人	UNIVERSITY OF EDINBURGH	发明人
分类号	G01R31/28;G01R31/3185;H01L21/66;H01L23/544;H01L27/14;H04N3/15	主分类号	G01R31/28
代理机构		代理人
主权项
地址

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