| 摘要 |
PURPOSE:To attain high speed locking without frequency difference up to an object frequency by connecting a base of a transistor(TR) in parallel with one end of a lag filter resistor being a component of a lag lead filter at the side of a phase comparator, connecting the emitter to the other end in parallel and connecting the collector to a power supply. CONSTITUTION:A resistor 110 and a capacitor 111 forms a lag filter connected to an output of a phase comparator 104 and its cut-off frequency is selected sufficiently lower than the comparison frequency of the phase comparator 104. The characteristic of the loop depends on the lag lead filter connected to the succeeding stage. A TR 114 is connected across the resistor 107 in such a way that the base is connected to the resistor 107 at the side of the lag filter input/output terminal 112, the emitter is connected at the side of the lag filter input/output terminal 113 and the collector is connected to the power supply. Since a large voltage is generated between the lag filter input/output terminals 112 and 113 at application of power, the resistor 107 is put into a short-circuited state by the TR 114 thereby increasing the cut-off frequency of the loop. Moreover, a capacitor 109 is charged from the power supply at the same time to lock the loop at a high speed without any frequency difference up to the object frequency. |
