发明名称 |
Device for the self-synchronization of the output circuits of a memory using a three-state gate |
摘要 |
A self-synchronization device is disclosed for output circuits comprising a "3-state" gate of memories working in internal clock mode. This device consists of a sequential logic circuit which allows the "3-state" gate to go into low impedance only when a datum is available at the output of the read amplifiers.
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申请公布号 |
US4879693(A) |
申请公布日期 |
1989.11.07 |
申请号 |
US19870128169 |
申请日期 |
1987.12.03 |
申请人 |
SGS-THOMSON MICROELECTRONICS S.A. |
发明人 |
FERRANT, RICHARD |
分类号 |
G11C11/409;G11C7/10;G11C11/407 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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