Phase lock loop and improved phase detector therefor

摘要

A voltage controlled oscillator of a phase lock loop responds to a phase error signal having a value commensurate with the phase difference between input and output signals of the loop, wherein the phase difference extends over more than a one cycle difference of the loop input and output signals. The phase error signal is derived by mixing the loop input and output signals to derive a pair of signals having amplitudes representing orthogonal components of the difference frequency of the loop input and output signals. In response to the signals representing the orthogonal components, signals are derived indicative of the whole number cycle difference of the input and output signals, fractional cycle difference of the input and output signals, and a combination of the amplitudes of the signals representing the whole number cycle difference and the fractional cycle difference of the input and output signals. The latter combination indicates the amplitude of the arc whose tangent is the ratio of the input and output signals even though the loop input and output frequencies differ.