发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To make two oscillating frequencies the same, to make the output of 1st and 2nd multipliers stable and to vary the frequency of a voltage controlled oscillator by an external control voltage by applying the external control voltage to two voltage controlled oscillators via an adder so as to vary the output frequency. CONSTITUTION:An external control voltage 23 of a phase locked loop circuit is fed to two voltage controlled oscillators 9, 15 via adders 7, 17 to vary the oscillating frequency of the oscillators 9, 15. Each frequency is fed to a multiplier 11 via lines 10, 14, a DC component (difference) and a double frequency component are outputted to the output 12 and inputted to a multiplier 13. An output of a crystal vibrator 24 is applied from the reference oscillator 1 to the other multiplier 13 to output the reference frequency to the output 22 of the multiplier 13. Then the phase locked loop circuit is locked when the frequency of the output 22 is at the reference frequency, and the lock condition of the locked circuit is decided by the difference of the frequency of the oscillators 9, 15 and the frequency is controlled by the external control voltage.
申请公布号 JPH01274513(A) 申请公布日期 1989.11.02
申请号 JP19880102387 申请日期 1988.04.27
申请人 TDK CORP 发明人 IKEDA HIROSHI;KAMATA HIROSHI
分类号 H03L7/16 主分类号 H03L7/16
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