Integrated circuit having combinatorial logic functionality and provided with transmission gates having a low threshold voltage.

摘要

Integrated logic CMOS-circuit which operates at a reduced supply voltage between 2 and 3.6 Volts. So as to provide reliable operation of the circuit at this low supply voltage and to substantially limit the power dissipation in this logic circuit it is proposed to design the transmission gates (T1,T2) in that circuit as one single N-channel transistor having a threshold voltage which is less than or equal to half the threshold voltage of NMOS-transistors in further gates of the logic CMOS-circuit. Preferably, the lower threshold voltage of NMOS-transistors in the transmission gates is approximately 0.3 Volt.