发明名称 |
Combined rate/width modulation arrangement. |
摘要 |
<p>Pulse modulation circuitry which receives n binary data bits and generates a rate/width pulse modulated signal representing the binary value of the received data bits. The lower order m of the n bits generate a rate modulated signal having a number of pulses equal to the binary value of the m bits. The remainder of the n bits width modulate the rate modulated pulses. Each least significant bit increase in the binary value of the received date bits increases the width of a rate modulated pulse by a predetermined amount.</p> |
申请公布号 |
EP0339922(A2) |
申请公布日期 |
1989.11.02 |
申请号 |
EP19890304090 |
申请日期 |
1989.04.25 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
BOHLEY, THOMAS K.;GARNETT, GROSVENOR H.;KOERNER, CHRISTOPHER;MOORE, CHARLES E. |
分类号 |
H03M1/82;H03M1/00 |
主分类号 |
H03M1/82 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|