发明名称 WAFER CONVEYANCE CONTROL METHOD FOR PHOTOLITHOGRAPHY PROCESS
摘要 PURPOSE:To increase the processing efficiency of a photolithography process, by conveying the exposure-test wafer of a lot to be processed after the preceding lot, giving the exposure-test wafer precedence over the wafers of the preceding lot, and by checking the wafer in addition to its test-exposure and develop- processing. CONSTITUTION:A wafer W1 is conveyed to the third buffer 8, even when a wafer Wa of the preceding lot remains in the buffer 8, by making an operator turn on a exposure test start switch 13, and the wafer W1 is also conveyed to a stepper 9 preferentially as a wafer for exposure-test, then it is test-exposed. When the wafer W1 is carried out of the stepper 9, a exposure-test signal is so attached to the wafer W1 that each following processing device may detect the wafer W1 is a wafer for the exposure test. When the fourth buffer 10 or the fifth buffer 13 has a wafer Wa of the preceding lot, the wafer W1 is also conveyed to a spin developer 14 preferentially, and it is developed and checked. This increases the processing efficiency of photolithography process.
申请公布号 JPH01273314(A) 申请公布日期 1989.11.01
申请号 JP19880101420 申请日期 1988.04.26
申请人 OKI ELECTRIC IND CO LTD 发明人 SHIMODA TETSUYA
分类号 H01L21/30;G03F7/00;H01L21/027 主分类号 H01L21/30
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