发明名称 OFFSET QUARTER PHASE SHIFT KEYING SYNCHRONOUS CIRCUIT
摘要 PURPOSE: To reduce remaining noise by applying a phase loop error voltage to a voltage-controlled oscillator(VCO) through a filter to perform analog control over a demodulator. CONSTITUTION: This circuit is equipped with a demodulator 10 as a 4-phase demodulator, a processor module consisting of a module 11 for multiplication by (-j)<k> , a decision circuit 12 which obtains the sign of the real number part of a signal y<k> sent by the module 11, a clock rate error calculating circuit 13, a correcting circuit 14 which sends a clock signal H for control, a circuit 15 for phase error calculation, and a correcting circuit 16 which sends a phase error correction signal. The correcting circuit 16 includes a VCO 49 behind a filter 48 and supplies an analog control voltage to the demodulator 10. Consequently, the remaining noise is reducible to an arbitrary extent.
申请公布号 JPH01273464(A) 申请公布日期 1989.11.01
申请号 JP19890063395 申请日期 1989.03.15
申请人 ALCATEL NV 发明人 FUIRITSUPU SEIA
分类号 H04L27/22;H04L7/02;H04L27/00;H04L27/227 主分类号 H04L27/22
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