发明名称 OUTPUT CIRCUIT
摘要 PURPOSE:To reduce the number of elements by connecting first PMOS and NMOS transistors TRs in series between different power sources. CONSTITUTION:A P-channel MOS TR P1 and an channel MOS TR N1 are connected in series between a power source (positive side) V and a power source (negative side) G. When an in-phase control terminal C is in the high level and an anti-phase control terminal the inverse of C is in the low level, TRs P2 and N2 are turned off together. Therefore, TRs P1 and N1 are turned off together, and an output terminal O is set to a high impedance state independently of the input signal from an input terminal I. When the in-phase control terminal C is in the low level and the anti-phase control terminal the inverse of G is in the high level, TRs P2 and N2 are turned on together, and the inverted output of the input signal is obtained in the output terminal O because the input signal from the input terminal I is transmitted to gates of TRs P1 and N1. Thus, the number of elements is reduced and their occupation area is reduced.
申请公布号 JPH01272228(A) 申请公布日期 1989.10.31
申请号 JP19880100565 申请日期 1988.04.22
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 WATANABE TATSUHIKO
分类号 H03K19/0175;H03K19/094 主分类号 H03K19/0175
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