发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To improve the follow-up property of output frequency to objective frequency by comparing the rise edge of an input signal with that of a feedback signal and obtaining phase difference information twice in one period. CONSTITUTION:The title circuit is constituted so that phase difference information is outputted twice in one period from a difference between the leading edge of an input signal measured by a phase comparator 1 and a pulse width measuring circuit 2 and the trailing edge of a feedback signal. Phase control operation is executed by an arithmetic circuit 3 consisting of a microcomputer e.g., based upon the phase difference information. Phase coincidence is executed by outputting a corresponding frequency signal from a variable frequency oscillation circuit 9 in accordance with the computed result.
申请公布号 JPH01272323(A) 申请公布日期 1989.10.31
申请号 JP19880102012 申请日期 1988.04.25
申请人 MITSUBISHI ELECTRIC CORP 发明人 SANADA KAZUNORI;KAWAI JOJI
分类号 H03L7/06;H03L7/085;H03L7/099 主分类号 H03L7/06
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