PULSE GENERATOR OF MEMORY DEVICE

摘要

The pulse generator for providing control pulse to pre-charge the bit line of SRAM includes a latch circuit for providing the start/stop pulses for charging to the bit line, a gate circuit for maintaining the high level at a start time of pre-charge and the low level at a transfer time to the second edge, a delay circuit for delaying for a certain time, a buffer for providing a logic signal, and a charger for charging the delay circuit and preventing the misoperation of the pulse width of the pre-charge.