发明名称 INTEGRATED CIRCUIT PROVIDED WITH CHECK FUNCTION FOR PROCESSING CHARACTER DATA
摘要 PURPOSE:To prevent the increase of the number of terminals by by-passing switching circuits to connect the address bus and the data bus of a data buffer circuit to the address bus and the data bus of connection terminals after requesting check. CONSTITUTION:When check is requested, switching circuits 53 and 54 are by- passed to connect an address bus 50 and a data bus 51 of a data buffer circuit 45 to the address bus 50 and the data bus 51 of connection terminals 47-49. Consequently, when switching circuits 53 and 54 are so set that the address bus 50 and the data bus 51 of a character data taking-in circuit 44 are connected to the address bus 50 and the data bus 51 of the data buffer circuit 43, taking-in of the character data taking-in circuit 44 is checked through connection terminals 44-49 to prevent the increase of the number of terminals. Further, character data taken into the character taking-in circuit 44 is written in the data buffer circuit 45.
申请公布号 JPH01270468(A) 申请公布日期 1989.10.27
申请号 JP19880099517 申请日期 1988.04.22
申请人 TOSHIBA CORP 发明人 KAMATA TOSHIO
分类号 G06F11/22;H01L21/66;H01L21/822;H01L27/04;H04N7/025;H04N7/03;H04N7/035;H04N7/08 主分类号 G06F11/22
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