| 摘要 |
PURPOSE:To prevent misidentification of a data by blocing an input to a digital phase locked circuit until the count of a timing clock reaches a prescribed content in receiving a burst data. CONSTITUTION:A burst detecting circuit 9 detecting the reception of the burst data and a counter 10 starting the count of a timing clock signal of an output of the digital phase locked circuit 7 with its detected output signal and blocking an output signal of a limiter amplifier 6 to the digital phase locked circuit 7 until a prescrived content is obtained, are provided. Thus, since the timing clock signal locked with the preceding phase without using the timing clock signal apt to causing a large phase shift at the head of the burst data is used, the head bit is identified surely. |
