发明名称 SEMICONDUCTOR CIRCUIT DEVICE
摘要 <p>PURPOSE:To improve the AC standard by using a 3rd clock generating means which produces a 3rd internal clock signal that rises at the fall edge of a 1st internal clock signal and falls at the fall edge of a 2nd internal clock signal. CONSTITUTION:A 3rd internal clock signal phiF is produced and this signal rises and falls at the fall edges of 1st and 2nd internal clock signals phi1 and phi2 which are produced from the external clock signals. Thus the rise edges of both signals phi1 and phi2 (depending on Td1 and Td2) are not concerned in production of the signal phiF. As a result, the signal phiF which is effective for improvement of the AC standard is obtained without causing any malfunction. Thus it is possible to accelerate the decision of an output signal and to improve the AC standard without unstabilizing the working of a semiconductor circuit.</p>
申请公布号 JPH01265315(A) 申请公布日期 1989.10.23
申请号 JP19880093837 申请日期 1988.04.15
申请人 FUJITSU LTD;FUJITSU MICROCOMPUTER SYST LTD 发明人 IINO HIDEYUKI;YOSHITAKE AKIHIRO;HIDA HIDENORI
分类号 G06F1/06;G06F1/10 主分类号 G06F1/06
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