| 摘要 |
The invention relates to semi-conductor memory technology. A memory according to the invention comprises a circuit 1 which produces internal selection signals in relation with a microchip selection signal applied to the memory; a pulse generation circuit 3 which detects changes in the address signal; and a circuit 9 for changing pulse width which emits a control signal in order to preload or equalize the data lines of an array of memory cells 6. The circuit for changing pulse width lengthens the duration of the pulses of the signal which is applied to it when the internal selection signals are in the selection condition. Application to fast memories. <IMAGE>
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