发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To provide a low sheet resistance and reduce the occupation area of wirings and further the area of the entire IC by a method wherein thin high melting point metallic silicides in single crystal form are formed on the surface of impurity diffused layers for wiring, and wirings due to high melting point metal are formed thereon. CONSTITUTION:After formation of P<+> type channel stoppers 32 and adhesion of field oxide films 33 are performed on a P type Si substrate 31, a gate insulation film 34 is adhered on the substrate surface. Next, after adhering Si nitride films 35 which serve as masks, the films 34 and 35 of parts serving as wiring regions are removed, and thin Mo films 36 are adhered. Further, an N type impurity is implanted via the Mo thin films, and accordingly N type impurity layers 38 are formed. While, the Si substrate of wiring regions and the thin films 36 are reacted by heat treatment resulting in the formation of the Mo silicide films in single crystal form 37. The Mo films are adhered, then the Mo films except for the parts serving as the gate electrode and wirings are removed, and source and drain electrodes are provided by ion implantation.
申请公布号 JPS58161373(A) 申请公布日期 1983.09.24
申请号 JP19820022542 申请日期 1982.02.15
申请人 NIPPON DENKI KK 发明人 MORIMOTO MITSUTAKA;NAGASAWA EIJI;OKABAYASHI HIDEKAZU
分类号 H01L21/3205;H01L23/52;H01L29/78 主分类号 H01L21/3205
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