发明名称 MULTIFRAME SYNCHRONIZING DEVICE
摘要 <p>PURPOSE:To realize a multiframe synchronizing device with a small-scale circuit constitution by providing a correction circuit to correct the stored timing information of the corresponding basic frame of a storage circuit in the case of deciding as synchronizing step-out by a synchronization decision circuit. CONSTITUTION:A timing output circuit 52 outputs a timing signal at timing when the synchronizing signal of each basic frame is inputted based on the input timing information of the synchronizing signal of the storage circuit 51. The synchronization decition circuit 53 detects whether the synchronizing signal is inputted while synchronizing with this timing signal or not, and decides whether each basic frame is synchronized or synchronizing step-out. In the case of synchronizing step-out, the timing information of the corresponding basic frame of the basic frame of the storage circuit 51 is corrected by the correction circuit 54. Besides, when a forward protection circuit is provided, a synchronizing step-out indication signal is outputted from a synchronizing step-out indication circuit 57, and when a backward protection circuit is provided, a synchronization establishment signal is outputted from a synchronization circuit 50 after the number of times of continuous synchronization reaches a prescribed value.</p>
申请公布号 JPH01261939(A) 申请公布日期 1989.10.18
申请号 JP19880090944 申请日期 1988.04.13
申请人 FUJITSU LTD 发明人 YAMAZAKI YOSHIKI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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