发明名称 Method for phase-locked frequency conversion
摘要 Methods for phase-locked frequency multiplication or, respectively, frequency division in which, from an input frequency, an output frequency is generated which is in a fixed rational relationship to the input frequency, are often used in measuring technology, particularly in the measuring technology of internal combustion engines. The invention is based on the object of improving methods of this type in such a manner that the required conversion of the input frequency follows faster and, in particular, no settling times or only very short settling times are required. In a method of the said type, this is achieved by the output phase (T2) being synchronised mathematically with the input phase (T1) by means of a controller. In this arrangement, the phase angle of the output signal can be synchronised by the input signal. It is possible, in particular, for the phase angle of the output signal to be set with the aid of a phase shifter or settable divider at the frequency output (Figure 1). <IMAGE>
申请公布号 DE3810809(A1) 申请公布日期 1989.10.12
申请号 DE19883810809 申请日期 1988.03.30
申请人 FEV MOTORENTECHNIK GMBH & CO KG, 5100 AACHEN, DE 发明人 SCHMITZ, GUENTER, DR.-ING.;REGGELIN, BERND, DIPL.-ING., 5100 AACHEN, DE
分类号 G06F7/68;H03K5/00;H03K5/156;H03L7/093;H03L7/183 主分类号 G06F7/68
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