| 摘要 |
<p>This error rate measuring circuit is intended for synchronous digital transmission equipment transmitting an arbitrary periodic test sequence and delivering in response a synchronous digital reception data signal (5) with its reception clock signal (H). It comprises: a cycle-stealing circuit (40) operating on the reception clock signal H, a local generator (20) which generates the periodic test sequence and which is timed by the reception clock signal reaching it via the cycle-stealing circuit (40), a comparator circuit (10) comparing the test sequence generated by the local generator (20) with that present in the digital reception signal (5), an error-counting circuit (30) placed after the comparator circuit (10) and a circuit (50) for detecting discordance configurations, which is connected up after the comparator circuit (10), and which controls the cycle-stealing circuit (40) in such a way as to bring about cycle stealing in the event of successive discordances between the data of the digital reception signal (5) and the periodic test sequence generated by the local generator (20). <IMAGE></p> |
