| 摘要 |
PURPOSE:To reduce the time required for readout/write-in, by setting the word line potential to the range smaller than the transfer transistor threshold voltage. CONSTITUTION:A dynamic RAM, is constituted with a word line 12 transmissing a signal from a row decoder 11 horizontally and a bit line 13 is located vertically and a memory cell 14 which connectes between the lines. A signal from the row decoder 11 is supplied to a bootstrap circuit in capacitance C1 and a transistor (TR) T2 via a TRT1 the gate of which is connected to a power supply VDD to drive the word line 12. The end of this word line 12 is connected to a connecting point of TRs T3, T4 in series connection between the power supply VDD and ground, and the potential of the word line 12 rises to the conductance ratio of the TRs T3, T4. Thus, the voltage reaches a voltage required for readout/ write-in a short time. |
