发明名称 |
GALLIUM ARSENIDE SEMICONDUCTOR MEMORY INTEGRATED CIRCUIT |
摘要 |
PURPOSE:To improve soft error-proof property by a method wherein Schottky diodes are inserted between the inputs and outputs of a pair of inverter circuits in cross connection and resistance elements are inserted between a negative power source and the inputs of the respective inverter circuits. CONSTITUTION:The anode and cathode of a Schottky diode D1 are connected to the output node 8 of a first E/D inverter and the input node 16 of a second E/D inverter respectively. The anode and cathode of a Schottky diode D2 are connected to the output node 9 of the second E/D inverter and the input node 15 of the first E/D inverter respectively. Further, resistance elements R1 and R2 are inserted between a negative electric power source 17 and the respective input nodes 15 and 16. With this constitution, the voltage amplitude of data stored in a memory cell can be enlarged and soft error-proof property can be improved. |
申请公布号 |
JPH01253957(A) |
申请公布日期 |
1989.10.11 |
申请号 |
JP19880081278 |
申请日期 |
1988.04.04 |
申请人 |
AGENCY OF IND SCIENCE & TECHNOL |
发明人 |
MAKINO HIROYUKI;TAKANO SATOSHI;MATSUE SHUICHI |
分类号 |
H01L27/04;H01L21/822;H01L27/10;H01L27/11;H01L29/80 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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