发明名称 AUTOMATIC FREQUENCY CONTROL CIRCUIT
摘要 PURPOSE:To shorten the lead-in time of a system by securing such a constitution where a phase frequency detector outputs two output error signals in accordance with the relation of frequencies between an output signal obtained by mixing two signals and a reference signal and a controller uses the two error signals to always keep the voltage control terminal of a voltage control oscillator under a negative feedback state. CONSTITUTION:An output signal f1 that undergone the conversion of frequency via a mixer 1 is inputted to a phase frequency detector 3 together with a reference signal fREF produced by a reference signal generator 2. Then two output error signals f1 and f2 received from the detector 3 are inputted to a controller 4. The controller 4 refers to the states of both signals f1 and f2 to apply such voltage to the voltage control terminal of a voltage control oscillator 5 so that this control terminal is always set in a negative feedback state. As a result, the signal f1 of the mixer 1 is always synchronized with a fixed frequency regardless of the frequency drift of an input signal fR. Thus the lead-in operation of a system is minimized.
申请公布号 JPH01251823(A) 申请公布日期 1989.10.06
申请号 JP19880075921 申请日期 1988.03.31
申请人 NEC CORP 发明人 TANAKA HIROYUKI
分类号 H03L7/10 主分类号 H03L7/10
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