| 摘要 |
PURPOSE:To make it possible to reduce the output current of an FET complete ly to zero and to stop the light output completely when an input signal is inter rupted, by operating a bias voltage controlling circuit to decrease a bias voltage below a pinch off voltage forcedly when the input signal is interrupted. CONSTITUTION:When an input signal Vi is interrupted, an interruption signal 33 is input to a terminal 32 and a transistor 31 becomes on. Consequently, an electric potential of non-inversion input of an operational amp 27 lowered to VEE and a clamp voltage VC also lowers to VEE, and accordingly, a gate bias voltage VG lowers. After all, VQ lowers as VG lowers. When the input signal Vi is interrupted, a gate electric potential of an FET 2 becomes VQOFF which is much lower than a pinch off voltage VP. It becomes possible to reduce an output flow (ip) absolutely to zero in this way. |
