| 摘要 |
<p>PURPOSE:To minimize the number of lines to be reread and to limit the number of components by equipping a circuit to read the contents of a polyphase memory array having plural number parts with first and second multiplexers, a demultiplexer, and its controller. CONSTITUTION:When data are read, a second multiplexer 50 enables an input from a memory part 10 for the prescribed address of the polyphase memory array. A first multiplexer 40 successively selects data bytes out of data bytes stored in the specific address of the enabled memory part one bit at a time for rereading. The serial stream of data bits from the first multiplexer 40 pro ceeds through the second multiplexer 50 to a demultiplexer 60, and the demultiplexer 60 recomposes the data bytes stored in the memory part 10 by a serial parallel conversion and reads the bytes from the memory array. The processing is repeated for the respective memory parts of the polyphase array. Thus, the number of the lines to be reread can be minimized, and also the number of the components can be limited.</p> |
