发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To prevent an access time from being increased by detecting the transition of the output of a sense amplifier from a high level to a low level or from the low level to the high level, and delaying the transition of the output of the sense amplifier by a prescribed time. CONSTITUTION:An output buffer part 15 is constituted of a NOR circuit 64, a AND circuit 64, and inverters 66a and 66b, and a sense amplifier detecting part 11 is constituted of a negative phase delay circuit 12 and a NOR circuit 13. The input terminal on one side of the NOR circuit 13 is connected to a signal line which supplies the output 55 of the sense amplifier to the output buffer part 15, and the input terminal on the other side is connected to the same signal line via the negative phase delay circuit 12. Also, the output of the sense amplifier detecting part 11 is supplied to a synthesis part 73. In such a way, it is possible to evade a noise due to a charge current or a discharge current from being fetched at the time of the transition of data output from the high level to the low level or vice versa, and also, to prevent the access time from being increased.
申请公布号 JPH01251495(A) 申请公布日期 1989.10.06
申请号 JP19880079773 申请日期 1988.03.31
申请人 NEC CORP 发明人 IWASHITA SHINICHI
分类号 G11C11/41;G11C11/34 主分类号 G11C11/41
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