| 发明名称 |
Integrated circuit device comprising interconnection wiring. |
| 摘要 |
<p>In an integrated circuit device such as a logic LSI having a row structure, each row includes a group of logic elements and a clock driver (27). The clock driver in each row is arranged at one end of the row so as to shorten the distances from the clock driver to a primary power supply wiring and a primary ground wiring.</p> |
| 申请公布号 |
EP0335695(A2) |
申请公布日期 |
1989.10.04 |
| 申请号 |
EP19890303115 |
申请日期 |
1989.03.29 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TANAKA, SHIGERU C/O PATENT DIVISION |
| 分类号 |
H01L21/822;G06F1/04;G06F1/10;H01L21/82;H01L23/52;H01L23/528;H01L27/02;H01L27/04;H03K5/00 |
主分类号 |
H01L21/822 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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