发明名称 Non-volatile semiconductor memory device and method for manufacture thereof.
摘要 <p>A non-volatile semiconductor memory comprises a stacked gate electrode having a control electrode (508) and a floating gate electrode (506) provided via an insulation layer (505) over the channel area (504) between a source (503) and a drain (502), and a sidewall gate electrode (511a) being provided via an insulation layer (505a, 509a) over the channel area (504) and the sidewall of the stacked gate. By applying a suitable voltage, the sidewall gate can be used as a selector gate so that read errors do not occur even when overerase is caused by electrical erase methods. The sidewall gate electrode can be manufactured by self-alignment processes, thereby this memory is suitable for miniaturization and high levels of integration.</p>
申请公布号 EP0335395(A2) 申请公布日期 1989.10.04
申请号 EP19890105629 申请日期 1989.03.30
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NARUKE, KIYOMI 206, HIGH TOWN TAKASHIMA-CHO
分类号 H01L29/788;H01L21/28;H01L21/8247;H01L29/423;H01L29/78;H01L29/792 主分类号 H01L29/788
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