Clock generator circuit and a synchronizing signal detection method in a sampled format system and a phase comparator circuit suited for generation of the clock

摘要

A recording-reproducing clock generator circuit generates a reproduced clock having a predetermined frequency from a read out signal including such pulses that the interval between two successive pulses thereof at a predetermined length is to be used as a synchronizing signal region. The circuit generates a reference clock of a predetermined frequency, generates a first sync signal detection signal when the distance between two successive pulses in the input signal measured by means of the clock pulses is equal to a predetermined reference value, separates a clock edge pulse from the input signal by using the first sync signal detection signal, and generates the reproduced clock having the predetermined frequency and synchronized with the separated clock edge pulse.