| 摘要 |
PURPOSE:To accurately measure an operating current by a method wherein a test signal generation circuit for testing a CMOS-type LSI consists of an N-type and P-type depression transistors and direct current is cut off to a test signal. CONSTITUTION:At the time of starting a test mode period deltaT, a high voltage -VP sufficiently lower than the 0 level is applied to an input terminal Ti as a starting voltage in accordance with a starting point TS, and by turning off an N-type depression transistor Qn, an input voltage V1 of a first buffer circuit B1 is lowered to about the 0 level of a power supply voltage VDD by a first capacity C1. Mutual conductance of a P-type transistor Qp in an inverter circuit consisting of the circuit B1 is so large that the output of an input voltage Vi is inverted and an output voltage VD1 of the circuit B1 is at the VDD level. Therefore, by setting RS flip-flop FF, a test mode voltage VT is active and will not return to a normal mode even if the input voltage changes from the 0 level to the VDD level. |
