发明名称 |
Enhanced CPU return address stack |
摘要 |
Hardware for performing microcode branching in a central processing unit allows for two different speeds of branches which can be used by microcode and includes flexibility to optionally inhibit the extra lines which enter the pipeline on a branch. A default branch path can be taken for a test result not yet available and can be replaced with a correct branch target during a clock pause if the test result is false. A return address stack is provided with decoupled loading and pushing to accommodate the two branching speeds. Microcode can specify loading the return address stack with a literal or register value to allow vectored branching and return to a desired line after a delayed call.
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申请公布号 |
US4872109(A) |
申请公布日期 |
1989.10.03 |
申请号 |
US19870117455 |
申请日期 |
1987.11.02 |
申请人 |
TANDEM COMPUTERS INCORPORATED |
发明人 |
HORST, ROBERT W.;HARRIS, RICHARD L. |
分类号 |
G06F9/26;G06F9/38 |
主分类号 |
G06F9/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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