| 摘要 |
PURPOSE:To improve the operating speed of a TFT circuit and to enable to microminiaturize and integrate an element by self-aligning a gate electrode with source and drain electrodes. CONSTITUTION:A gate electrode 12 is formed by sputtering and patterning of Al on a transparent glass substrate 11, and an oxidized silicon film 13 is then formed by sputtering as a transparent gate insulating film, an indium or tin oxidized film 14a is further accumulated. Subsequently, an amorphous silicon film 14b added with P (phosphorus) is accumulated by the glow discharge decomposition of SiH4 and PH3. Then, an negative type resist 15 is coated, ultraviolet ray is exposed with the electrode 12 as a mask from the back surface of the substrate 11, a development is performed, and the resist is patterned. Then, an amorphous silicon film added with P and indium, tin oxidized film are etched to form source 141 and drain 142 electrodes which are self-aligned with the gate electrode. An amorphous silicon film 16 is then accumulated by the flow discharge decomposition of the SiH2, formed in the prescribed pattern by PEP technique. Wirings out of the source and drain regions of an element are eventually formed in the desired pattern, thereby completing a TFT. |
