发明名称 |
Video graphics memory storage reduction technique |
摘要 |
A video graphics memory storage reduction technique combines a frame buffer memory system with a run length encoded memory system by providing a luminance/chrominance decoder/multiplexer to convert output digital data segments from a memory into color components in lieu of using a color look up table. The digital data segments also are input to a detector and a switch, with the luminance portion being compared with a predetermined fixed value outside the valid luminance value range and the chrominance portion being passed through the switch in lieu of a constant when the luminance matches the detector value. A run length encoder logic circuit uses the output of the switch to generate access commands for the memory, and the detector causes the luminance/chrominance decoder to hold the last color until the next digital data segment is accessed by the logic circuit.
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申请公布号 |
US4870479(A) |
申请公布日期 |
1989.09.26 |
申请号 |
US19880188945 |
申请日期 |
1988.05.02 |
申请人 |
DUBNER COMPUTER SYSTEMS, INC. |
发明人 |
DUBNER, ROBERT J. |
分类号 |
G06F12/00;G06T1/60;G09G5/00;G09G5/02;G11C8/00;H04N1/64;H04N5/907;H04N9/797;H04N11/04 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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