| 摘要 |
PURPOSE:To command respectively proper retransfer by discriminating whether a data receiving error generated at the transfer of data from the transmitting side to the receiving side is the one generated on a transmission line or a data logic error generated during data processing on the transmitting side. CONSTITUTION:At the completion of S-th data transmission to the receiving side R, an accumulated value ms indicating the number of data is stored in a transfer buffer BM and then inputted to a comparing circuit CMP. Similarly to the accumulated value of the number of data received precedently, the information of the number of received data is sent from registers RM, RN, added by an arithmetic circuit ALU and inputted to the comparing circuit CMP to be compared with the S-th data accumulated value ms received presently. When ms-1+ n's-1=ms, the precedently transmitted data have normally received. If the sum is larger than ms, the circuit CMP generates an output from a terminal 2 regarding that a data logic error is generated during the data processing of the transmitting side, and when the sum is smaller than ms, the circuit CMP generates an output from a terminal 3 judging that a fault is generated in the transmission side. |
