发明名称 FREQUENCY SYNTHESIZER OF A PHASE-LOCKED TYPE WITH A SAMPLING CIRCUIT
摘要 <p>A frequency synthesizer comprises a voltage control generator (11) for generating an output signal of a desired frequency in response to a control signal and a reference signal generator (13) for generating a reference frequency signal. The output signal is sampled (21) by the reference frequency to produce a sampled signal. The reference frequency signal is frequency divided (22) by a division factor determined by the desired frequency and the reference frequency. The sampled signal and the divided signal is compared (15) in phase and frequency and the control signal is produced depending on the phase difference between the both signals. For the division factor, two different values are determined by the desired frequency and the reference signal and one of the two values is selected according to a selection pattern determined by the reference frequency and the desired frquency. A control circuit (41) calculates the two values and a multistage frequency divider (42) generates the selection pattern signal under control of the control circuit (41).</p>
申请公布号 CA1260563(A) 申请公布日期 1989.09.26
申请号 CA19860517270 申请日期 1986.09.02
申请人 NEC CORPORATION 发明人 TAKAHARA, ATSUSHI;ISHIKAWA, TOMOYOSHI;TANAKA, HIROYUKI;OKUI, TAMIO
分类号 H03L7/20;(IPC1-7):H03L7/20 主分类号 H03L7/20
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