发明名称 MULTIPLYING DEVICE
摘要 PURPOSE:To execute multiplication in a processing time which is half of the conventional multiplication processing time, with the small increase of a hardware by simultaneously generating two partial products and obtaining a cumulative partial product with a three-input adder. CONSTITUTION:A multiplying device equips a cumulative partial product register 9 to hold the output of a three-input adder 10 and to execute again an input to the three-input adder 10, and a high order partial product generating circuit 7 to generate a high order partial product from a multiplicand and to input the multiplicand to the three-input adder 10. A low order partial product generating circuit 8 is provided to generate a low order partial product from the multiplicand and to input the product to the three-input adder 10 and a control circuit 6 is equipped to control the high order partial product generating circuit 7 and low order partial product generating circuit 8 from a multiplier. Thus, since the two partial products are simultaneously generated and the cumulative partial product is obtained by the three-input adder 10, the two fold processing can be executed with one cycle and the high speed multiplication can be executed.
申请公布号 JPH01241622(A) 申请公布日期 1989.09.26
申请号 JP19880070016 申请日期 1988.03.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKAHASHI KAZUNORI
分类号 G06F7/533;G06F7/52 主分类号 G06F7/533
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