发明名称
摘要 Disclosed is a process for reducing lithographic image size for integrated circuit manufacture. A mask (14) of photosensitive material having an opening (20) of a minimum size (A) dictated by the limits of lithography is formed on a substrate (10). Reduction in the image size is achieved by establishing sidewalls (24) to the interior vertical surfaces of the opening by depositing a conformal layer (22), followed by anisotropic etching. The dimension (C) of the new opening is reduced by the combined thickness of the two opposite insulator sidewalls. In a specific direct application of the disclosed process, a photomask/stencil having a pattern of openings of a minimum size smaller than possible by lithography, per se, is formed.
申请公布号 CA1260627(C) 申请公布日期 1989.09.26
申请号 CA19870549183 申请日期 1987.10.13
申请人 发明人
分类号 H01L21/302;G03F7/40;H01L21/027;H01L21/033;H01L21/266;H01L21/30;H01L21/3065;H01L21/308 主分类号 H01L21/302
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