| 摘要 |
<p>PURPOSE:To simplify circuit constitution and to facilitate picture processing by coding a signal with a sampling clock synchronously with a network synchronizing clock from a digital communication network. CONSTITUTION:A video signal (c) is supplied to an A/D converter 2-1 and a synchronizing separator 2-2, where a synchronizing signal (d) is separated from the video signal (c) and fed to a sampling clock generator 2-3 to generate a sampling clock (e) phase-locked to the synchronizing signal (d) and it is supplied to the A/D converter 2-1. The A/D converter 2-1 uses the sampling clock (e) to sample the video signal (c), converts it into a digital signal, which is fed to a coder 2-4. Then the coder 2-4 applied highly efficient coding and the result is stored in a buffer memory 2-5, the result is read from the buffer memory 2-5 at a speed of the network synchronizing clock (a), and sent to an output terminal 5.</p> |
