| 摘要 |
PURPOSE:To conduct a function test by timing groups at a time and to enable a delay test substantially by finding the delay time of respective input/output pins from circuit data on an LSI by analysis. CONSTITUTION:An input/output pin delay time analysis part 12 calculates the delay time of respective input/output pins by analysis from the constitution data on the LSI from a file 10 according to a reference set in analytic reference data 11, the delay time of respective pins which is obtained as a result of the analysis is classified by a following classification part 13 into timing groups divided by prescribed timing time as to the input and output pins and stored in a table 13. The data in the table 131 are inputted as test data to a function testing device 14 to conduct a test by the timing groups. Consequently, the delay test is conducted practically without requiring much time. |
