发明名称 CONTROLLER
摘要 PURPOSE:To attain the prefetch of a CPU and to increase processing speed by storing an independent operating mode in plural memory banks and selecting the memory bank, which is accessed by the CPU, with a selecting switch. CONSTITUTION:In correspondence to the condition of an output terminal I/O1 and a switch SW1 in a CPU 1, either a ROMa 2 or a ROMb 3 is made effective. Namely, when the terminal I/O1 is L, regardless of the turning-on/off of the switch SW1, a chip select terminal CS1 is selected and the CPU 1 is connected to the ROMa 2. When the terminal I/O1 is H and the SW1 is turned off, the ROMa 2 is selected and when the SW1 is turned on, the ROMb 3 is selected.
申请公布号 JPH01237732(A) 申请公布日期 1989.09.22
申请号 JP19880064900 申请日期 1988.03.17
申请人 SHARP CORP 发明人 ONISHI KAZUYUKI
分类号 G06F9/06;G03G15/00;G03G21/00;G06F9/46;G06F9/48;G06F12/06 主分类号 G06F9/06
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