| 摘要 |
PURPOSE:To prevent the transmission/reception of invalid data from being performed by giving the diagnosis of a master processor from a slave processor side incorporating a data link control circuit. CONSTITUTION:Diagnostic mechanisms 11B and 12B are provided on the slave processors 11 and 12 similarly as the master processor 10, and the presence/ absence of abnormality in the master processor 10 can be diagnosed by those mechanisms. And when no response message is sent via response mechanisms 10C and 10D within a prescribed time, it is decided that the abnormality is generated in the master processor 10, then an operation is stopped. |
