发明名称 PROGRAMMABLE LOGIC ARRAY
摘要 PURPOSE:To rewrite the program of a programmable logic array by controlling information for connecting an addition transistor or not by information written in a static cell. CONSTITUTION:For instance, when a word line is externally selected in a RAM cell for storing '1', '0' information, transmission gates TR0, TR1 are turned on and prescribed information is written in inverter latches R0, R1 in the AND plane element of a PLA through a bit line BL, the inverse of BL. When the potential of the A point of the input side of the latches R0, R1 is '1', the output of the A point of an output side is defined to be '0' and accordingly, the connection of the addition transistor ANO and a product term line is separated. When the potential of the 3 point is '0..., they are connected. Accordingly, the prescribed information can be written to the PLA element.
申请公布号 JPH01238219(A) 申请公布日期 1989.09.22
申请号 JP19880063623 申请日期 1988.03.18
申请人 FUJITSU LTD 发明人 MIURA DAISUKE
分类号 G06F7/00;H03K19/177 主分类号 G06F7/00
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