| 摘要 |
PURPOSE:To prevent the generation of the potential due to the distribution resistance by connecting cells arranged on the peripheral part of an operation part by one conductive type diffusion layer so that at least a part of a channel region may operate. CONSTITUTION:A plurality of cells are repeatedly provided by patterning not only inside an operation region of a chip but also along the periphery of the operation region. The region shown by an arrow A is the operation region and an emitter electrode 20 covers this operation region. An emitter peripheral electrode 27 is formed so as to continuously connect to this emitter electrode 20, further having a short circuit with a p<+> diffusion region 29 so as to attain an object of a field plate for securing pressure-tightness. Then, the holes entering the p<+> diffusion region under a gate peripheral electrode 25 are drawn out from the emitter electrode 20 covering the operation region together with from this emitter peripheral electrode 27. Consequently, a potential drop due to the distribution resistance inside the p<+> diffusion layer 29 is gone, further, the whole periphery of the operation region is connected with the same repeated pattern with the inside so that uniform operation is realized so as to improve the latch up. |
