发明名称 SHIFT REGISTER CIRCUIT
摘要 PURPOSE:To attain initialization with the clock signal of one period by providing a clock signal giving means to give a normal phase or opposite phase clock signal to all latch circuits in a serial circuit body in response to the command of the initialization. CONSTITUTION:An EX-NOR circuit 10 is provided instead of the inverter circuit of a conventional circuit and not only a clock signal CLK but also a setting signal SET to designate a timing to generate the signal of the same phase as the clock signal CLK are inputted to the EX-NOR circuit 10. Consequently, by giving the same clock signal CLK is given to all latches in response to the command of the initialization, the data given in response to the clock signal CLK are latched to all latches at the same time. Thus, a shift register circuit can be initialized by one period of the clock signal.
申请公布号 JPH01236498(A) 申请公布日期 1989.09.21
申请号 JP19880064233 申请日期 1988.03.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 MACHIDA HIROHISA
分类号 G11C19/00 主分类号 G11C19/00
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