发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To attain an action with a single power source voltage level by giving a supply voltage to the bit line of a memory transistor selected at the time of the data writing and giving a second high voltage to a word line. CONSTITUTION:The title device is provided with a first high voltage generating circuit C1 to generate a first high voltage VPP1 of a value sufficient to generate a tunnel phenomenon by an internal boosting and a second high voltage generating circuit C2 to generate a second high voltage VPP2 lower than the first high voltage VPP1 and higher than a supply voltage VCC by the internal boosting. At the time of the data collective erasing, the first high voltage VPP1 is given to all bit lines BL, a ground potential OV is given to all word lines WL, and at the time of writing data, the supply voltage VCC is given to the bit lines BL of a selected memory transistor MQ, the second high voltage VPP2 is given to the word lines WL and the ground potential OV is given to other bit line and a word line. Thus, it is not necessary to impress a high voltage having a sufficient current driving capacity from the external part.</p>
申请公布号 JPH01236496(A) 申请公布日期 1989.09.21
申请号 JP19880064235 申请日期 1988.03.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 TERADA YASUSHI;KOBAYASHI KAZUO;RINETSU MASANORI;NAKAYAMA TAKESHI;MIYAWAKI YOSHIKAZU
分类号 G11C17/00;G11C16/04;H01L21/822;H01L21/8247;H01L27/04;H01L27/10;H01L29/78;H01L29/788;H01L29/792 主分类号 G11C17/00
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