High-speed multiplexer for the temporal multiplexing of four digital signals to form a Gigabit-rate output signal, which can easily be integrated due to its preferred construction using emitter followers. The multiplexer contains four signal transistors each with one emitter terminal and four clock transistors each with two emitter terminals which are connected in a specific way to the emitter terminals of the signal transistors and to the four emitter terminals of a fourfold multi-emitter transistor whose collector terminal represents the multiplexer signal output. An emitter-coupled differential amplifier can be connected to the signal output in order to generate symmetrical output signals. <IMAGE>
