发明名称 POWER FAILURE CONTROL CIRCUIT
摘要 <p>PURPOSE:To cause an electric apparatus to stably make a restarting operation without making any unstable operation by utilizing the residual voltage of the source power source of the apparatus at the time of a power failure by securing a sufficient resetting operation time against the apparatus when the source power source breaks down and canceling the resetting operation after the source power source sufficiently restores at the time of restoration. CONSTITUTION:When a power failure takes place at time t0, a power failure detector 4 is actuated and an on-delay timer 5 starts time limiting operations. If the power failure continues even time t1 is reached, the output signal C of the timer 5 becomes a low level from a high level and gives a power failure signal to the electronic control circuit 3. At the same time, the output signal causes a timer 7 with reset to start time timing operations. The circuit 3 resets the time limiting operations of the timer 7 by raising the level of its output signal D from a low level to a high level after power failure restoring operations are processed and causes a timer 6 to start time limiting operations by making the input of a two-input OR gate 8 effective. When the power failure is restored at time t4, power supply is restarted after a sufficient time, during which the output signal of the on-delay timer 5 become high in level, and so forth.</p>
申请公布号 JPH01236317(A) 申请公布日期 1989.09.21
申请号 JP19880064238 申请日期 1988.03.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 SHIGEOKA FUMIAKI
分类号 G06F1/30;G06F1/00;H02J1/00 主分类号 G06F1/30
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