SIGNAL LEVEL DETECTING CIRCUIT

摘要

PURPOSE:To avoid the deterioration of accuracy for a signal level detecting circuit by counting the clocks at and after the detection of a zero-cross time point when an input signal is coincident with a prescribed fixed level and producing a sampling pulse when the time data reaches the prescribed value to apply the A/D conversion to the input signal based on the sampling pulse. CONSTITUTION:A comparator 13 detects a zero-cross time point when an input signal of a prescribed cycle is coincident with a prescribed fixed level. A counter 15 starts counting the clocks at and after the input of the detecting pulse of the comparator 3 for acquisition of the time data showing the lapse of time. Then a decoder 16 produces a sampling pulse when the time data reaches the prescribed value. Based on this sampling pulse, the input signal undergoes the A/D conversion via an A/D converter 12. As a result, the time covering the zero-cross point of said input signal through a peak point is previously known and therefore the sampling pulse can be produced in accordance with said zero-cross point. Thus the A/D conversion is possible at a low sampling frequency and it is possible to avoid the deterioration of accuracy despite a low sampling frequency.